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'''E. [wiki:GraspSw Controller Address Space and Clocking Instructions]''' |
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[[TracNav(GraspContents)]] |
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This is a very low level API, used only by someone writing a newer |
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controller socket level command. All controller socket level |
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commands are implemented in C code (downloaded as the stage2.srec |
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to the controller) which modifies registers or address space, and/or |
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writes instructions to the clocking engine. |
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Our FPGA [wiki:V2P20Phase0HWSWInterface Memory Map] includes [wiki:V2P20GPIO General Purpose I/O (GPIOs)] that |
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allow access to: |
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* Board ID Register Bits |
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* Board I2C Register Bits |
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* ADC SPI Configuration Register Interface |
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* Clocking Engine Register Interface |
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Todo: Incorporate the wiki pages above into GraspContents. |
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Related info: |
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* [wiki:ClockMath Clocking Engine Math Module] |
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* [wiki:VIDSEQ_bit_packing Clocking Engine pattern generator bit packing] |
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* PDF of clocking engine block diagram attached below. |
