'''E. [wiki:GraspSw Controller Address Space and Clocking Instructions]'''

[[TracNav(GraspContents)]]

This is a very low level API, used only by someone writing a newer
controller socket level command.  All controller socket level
commands are implemented in C code (downloaded as the stage2.srec
to the controller) which modifies registers or address space, and/or
writes instructions to the clocking engine.

Our FPGA [wiki:V2P20Phase0HWSWInterface Memory Map] includes [wiki:V2P20GPIO General Purpose I/O (GPIOs)] that
allow access to:

 * Board ID Register Bits
 * Board I2C Register Bits
 * ADC SPI Configuration Register Interface
 * Clocking Engine Register Interface

Todo: Incorporate the wiki pages above into GraspContents.

Related info:

 * [wiki:ClockMath Clocking Engine Math Module]
 * [wiki:VIDSEQ_bit_packing Clocking Engine pattern generator bit packing]
 * PDF of clocking engine block diagram attached below.